The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Nov. 29, 2016
Filed:
Sep. 27, 2012
Intel Corporation, Santa Clara, CA (US);
Xiuting C. Man, Portland, OR (US);
Christopher P. Mozak, Beaverton, OR (US);
Shaun M. Conrad, Cornelius, OR (US);
Jeffery L. Krieger, Portland, OR (US);
Philip R. Lehwalder, Hillsboro, OR (US);
Inder M. Sodhi, Folsom, CA (US);
Intel Corporation, Santa Clara, CA (US);
Abstract
Power gating control architectures. A memory device having at least a memory array and input/output (I/O) lines terminated on the memory device with termination circuitry coupled to receive a termination supply voltage (V) with power gating circuitry to selectively gate the termination supply voltage in response to a power gating control signal (VttControl) is coupled with a processing core coupled with the memory device, the processing core to selectively assert and deassert the VttControl signal.