The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 22, 2016

Filed:

Sep. 29, 2015
Applicant:

Texas Instruments Incorporated, Dallas, TX (US);

Inventors:

Peeyoosh Nitin Mirajkar, Maharashtra, IN;

Jagdish Chand Goyal, Karnataka, IN;

Sankaran Aniruddhan, Tamil Nadu, IN;

Assignee:
Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
H03L 7/06 (2006.01); H03L 7/095 (2006.01); H03L 7/089 (2006.01); H03L 7/107 (2006.01);
U.S. Cl.
CPC ...
H03L 7/095 (2013.01); H03L 7/089 (2013.01); H03L 7/1072 (2013.01); H03L 7/1077 (2013.01);
Abstract

Described examples include circuitry and methods to control lock time of a phase lock loop (PLL) or other locking circuit, in which a phase frequency detector (PFD) circuit is switched from a first mode to provide a control input signal to a charge pump as a pulse signal having a pulse width corresponding to a phase difference between a reference clock signal and a feedback clock signal to a second mode to hold the control input signal at a constant value for a predetermined time in response to detected cycle slip conditions to enhance loop filter current during frequency transitions to reduce lock time for the locking circuit.


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