The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 22, 2016

Filed:

Aug. 17, 2015
Applicant:

Samsung Electronics Co., Ltd., Suwon-si, Gyeonggi-do, KR;

Inventors:

Se-Chan Lim, Boryeong-si, KR;

Sang-Pil Sim, Seongnam-si, KR;

Dong-Kyun Sohn, Seongnam-si, KR;

Su-Youn Yi, Yongin-si, KR;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/8238 (2006.01); H01L 27/092 (2006.01); H01L 29/66 (2006.01); H01L 29/78 (2006.01);
U.S. Cl.
CPC ...
H01L 27/092 (2013.01); H01L 21/823807 (2013.01); H01L 21/823814 (2013.01); H01L 21/823864 (2013.01); H01L 29/66477 (2013.01); H01L 29/66628 (2013.01); H01L 29/66636 (2013.01); H01L 29/78 (2013.01); H01L 29/7848 (2013.01); H01L 29/6656 (2013.01); H01L 29/66545 (2013.01);
Abstract

A semiconductor device including source drain stressors is provided. The semiconductor device includes a gate structure including a gate insulating layer and a gate electrode on a semiconductor substrate. Gate spacers may be disposed on sidewalls of the gate structure and a stressor pattern including an impurity region is disposed on a side of the gate structure. The stressor pattern includes a protruded portion having a top surface higher than a bottom surface of the gate structure and a facet in the protruded portion. The facet is slanted at a predetermined angle with respect to an upper surface of the semiconductor substrate and forms a concave portion with one of the gate spacers. A blocking insulating layer may extend conformally on the stressor pattern and the gate spacers and an insulating wing pattern is disposed in the concave portion on the blocking insulating layer.


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