The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 22, 2016

Filed:

Dec. 19, 2014
Applicant:

Texas Instruments Incorporated, Dallas, TX (US);

Inventors:

Licheng Marshal Han, Firsco, TX (US);

Michael Andrew Serafin, Richardson, TX (US);

Byron Williams, Plano, TX (US);

Sandra Rodriguez Varela, Allen, TX (US);

Salvatore Pavone, Murphy, TX (US);

Assignee:
Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/4763 (2006.01); H01L 23/00 (2006.01); H01L 23/31 (2006.01); H01L 23/532 (2006.01); H01L 49/02 (2006.01); H01L 21/768 (2006.01); H01L 21/784 (2006.01); H01L 23/522 (2006.01);
U.S. Cl.
CPC ...
H01L 24/05 (2013.01); H01L 21/76801 (2013.01); H01L 21/76802 (2013.01); H01L 23/3192 (2013.01); H01L 23/5329 (2013.01); H01L 23/53295 (2013.01); H01L 28/10 (2013.01); H01L 21/784 (2013.01); H01L 23/5227 (2013.01); H01L 2224/05567 (2013.01); H01L 2224/94 (2013.01); H01L 2924/14 (2013.01); H01L 2924/19042 (2013.01); H01L 2924/19104 (2013.01); H01L 2924/35121 (2013.01);
Abstract

An integrated circuit and method with a delamination free opening formed through multiple levels of polymer dielectric. The opening has a vertical sidewall and no interface between adjacent levels of polymer dielectric is exposed on the vertical sidewall.


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