The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Patent No.:

US 9501299 B1

PDF
Full Text
Expired
Date of Patent:
Nov. 22, 2016

Filed:

Jun. 16, 2014
Applicant:

Intel Corporation, Santa Clara, CA (US);

Inventors:

Ameya Ambardekar, Hillsboro, OR (US);

Avinash N. Ananthakrishnan, Portland, OR (US);

Ian M. Steiner, Hillsboro, OR (US);

Assignee:

Intel Corporation, Santa Clara, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 1/00 (2006.01); G06F 9/445 (2006.01); G06F 1/32 (2006.01); G06F 9/48 (2006.01);
U.S. Cl.
CPC ...
G06F 9/44505 (2013.01); G06F 1/32 (2013.01); G06F 9/4893 (2013.01);
Abstract

A processor may include a cause agnostic frequency dither filter (FD filter), which may cause reduction in the frequency transitions while maintaining the performance levels. The FD Filter may minimize the performance loss, which may otherwise accrue from these frequency transitions, while trying to maximize the peak frequency of the processor. The FD filter may determine a minimum and maximum limit, which may be used by a power management unit (PMU) to restrict the number of frequency transitions to be within a specified threshold. The FD filter may determine the maximum and minimum limits based on transition data stored in internal tables captured during one or more time windows (or observation windows). Based on an average system behavior, the PMU may either apply the minimum or the maximum limit over the subsequent time window.


Find Patent Forward Citations

Ambardekar, Ameya. (2016). Minimizing performance loss on workloads that exhibit frequent core wake-up activity (U.S. Patent No. 9501299). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/9501299

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