The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 22, 2016

Filed:

Jan. 31, 2014
Applicant:

Intel Corporation, Santa Clara, CA (US);

Inventors:

Youfeng Wu, Palo Alto, CA (US);

Shiliang Hu, Los Altos, CA (US);

Edson Borin, San Jose, CA (US);

Cheng Wang, San Ramon, CA (US);

Assignee:

Intel Corporation, Santa Clara, CA (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F 1/32 (2006.01); G06F 9/38 (2006.01); G06F 9/50 (2006.01); G06F 9/445 (2006.01); G06F 9/48 (2006.01); G06F 11/34 (2006.01);
U.S. Cl.
CPC ...
G06F 1/329 (2013.01); G06F 1/3287 (2013.01); G06F 9/3851 (2013.01); G06F 9/445 (2013.01); G06F 9/4893 (2013.01); G06F 9/5027 (2013.01); G06F 9/5094 (2013.01); G06F 11/3466 (2013.01); G06F 11/3409 (2013.01); G06F 11/3452 (2013.01); G06F 2201/81 (2013.01); G06F 2201/865 (2013.01); G06F 2201/88 (2013.01); G06F 2209/501 (2013.01); Y02B 60/1282 (2013.01); Y02B 60/142 (2013.01); Y02B 60/165 (2013.01); Y02B 60/32 (2013.01);
Abstract

Dynamically switching cores on a heterogeneous multi-core processing system may be performed by executing program code on a first processing core. Power up of a second processing core may be signaled. A first performance metric of the first processing core executing the program code may be collected. When the first performance metric is better than a previously determined core performance metric, power down of the second processing core may be signaled and execution of the program code may be continued on the first processing core. When the first performance metric is not better than the previously determined core performance metric, execution of the program code may be switched from the first processing core to the second processing core.


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