The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Nov. 15, 2016
Filed:
Nov. 07, 2012
Applicant:
Lattice Semiconductor Corporation, Portland, OR (US);
Inventor:
Kihong Kim, Cupertino, CA (US);
Assignee:
LATTICE SEMICONDUCTOR CORPORATION, Portland, OR (US);
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G02B 6/42 (2006.01); H05K 1/11 (2006.01); H05K 3/36 (2006.01); H05K 3/40 (2006.01); G02B 6/43 (2006.01); H05K 1/02 (2006.01); H05K 1/14 (2006.01);
U.S. Cl.
CPC ...
H05K 1/117 (2013.01); G02B 6/42 (2013.01); H05K 3/366 (2013.01); H05K 3/403 (2013.01); G02B 6/4214 (2013.01); G02B 6/4246 (2013.01); G02B 6/4292 (2013.01); G02B 6/43 (2013.01); H05K 1/0274 (2013.01); H05K 1/141 (2013.01); H05K 2201/09072 (2013.01); H05K 2201/09145 (2013.01); H05K 2201/10121 (2013.01); Y10T 29/4913 (2015.01);
Abstract
Exemplary embodiments of methods and apparatuses to provide an electro-optical alignment are described. An electrical connector is formed on a printed circuit board substrate that extends onto a side surface of the substrate to form an electrical turn. An optoelectronic die is placed onto the printed circuit board substrate. The optoelectronic die on the printed circuit board substrate is erected over a mounting board to provide optical coupling substantially parallel to the mounting board.