The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 15, 2016

Filed:

Dec. 16, 2011
Applicants:

Yuichi Minoura, Kawasaki, JP;

Toshihide Kikkawa, Kawasaki, JP;

Toshihiro Ohki, Kawasaki, JP;

Inventors:

Yuichi Minoura, Kawasaki, JP;

Toshihide Kikkawa, Kawasaki, JP;

Toshihiro Ohki, Kawasaki, JP;

Assignee:

FUJITSU LIMITED, Kawasaki, JP;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 29/778 (2006.01); H01L 21/265 (2006.01); H01L 29/06 (2006.01); H01L 29/10 (2006.01); H01L 29/66 (2006.01); H01L 29/20 (2006.01); H01L 29/423 (2006.01); H01L 29/45 (2006.01);
U.S. Cl.
CPC ...
H01L 29/7787 (2013.01); H01L 21/2654 (2013.01); H01L 29/0603 (2013.01); H01L 29/1075 (2013.01); H01L 29/66462 (2013.01); H01L 29/2003 (2013.01); H01L 29/42356 (2013.01); H01L 29/42376 (2013.01); H01L 29/452 (2013.01);
Abstract

At least one kind of impurity selected from, for example, Fe, C, B, Ti, Cr is introduced into at least a buffer layer of a compound semiconductor layered structure from a rear surface of the compound semiconductor layered structure to make a resistance value of the buffer layer high.


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