The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Nov. 15, 2016
Filed:
Dec. 18, 2015
Texas Instruments Incorporated, Dallas, TX (US);
Srinivasa Raghavan Sridhara, Plano, TX (US);
Sanjeev Kumar Suman, Bangalore, IN;
Premkumar Seetharaman, Bangalore, IN;
Keshav Bhaktavatson Chintamani, Bangalore, IN;
Atul Ramakant Lele, Bangalore, IN;
Raviprakash S. Rao, Dallas, TX (US);
Parvinder Kumar Rana, Bangalore, IN;
Ajith Subramonia, Bangalore, IN;
Vipul K. Singhal, Bangalore, IN;
Malav Shrikant Shah, Bangalore, IN;
Bharath Kumar Poluri, Bangalore, IN;
TEXAS INSTRUMENTS INCORPORATED, Dallas, TX (US);
Abstract
A system on a chip (SOC) includes a processor and a memory system coupled to the processor. The memory system includes a static random access memory (SRAM) bank and a memory controller. The SRAM bank includes a first switch coupled to a SRAM array power supply and a source of a transistor of an SRAM storage cell in an SRAM array. The SRAM bank also includes a second switch coupled to a NWELL power supply and a bulk of the transistor of the SRAM storage cell. The second switch is configured to close prior to the first switch closing during power up of the SRAM array.