The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Nov. 08, 2016
Filed:
Oct. 02, 2013
Fine grain programmable gate architecture with hybrid logic/routing element and direct-drive routing
Applicant:
Tony Kai-kit Ngai, Saratoga, CA (US);
Inventor:
Tony Kai-Kit Ngai, Saratoga, CA (US);
Assignee:
EFINIX, INC., Milpitas, CA (US);
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H03K 19/177 (2006.01); H03K 19/0175 (2006.01); H03K 19/173 (2006.01);
U.S. Cl.
CPC ...
H03K 19/017581 (2013.01); H03K 19/1737 (2013.01); H03K 19/17728 (2013.01);
Abstract
An apparatus is disclosed herein for a programmable gate architecture with hybrid logic/routing circuitry. In one embodiment, a programmable gate array comprises a plurality of hybrid logic or routing tiles (HLRT), each of the HLRTs having a hybrid logic-or-routing function (HLR) that is configurable as a logic function or a routing function.
Ngai, Tony Kai-Kit. (2016). Fine grain programmable gate architecture with hybrid logic/routing element and direct-drive routing (U.S. Patent No. 9490811). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/9490811
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