The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Nov. 08, 2016
Filed:
Dec. 31, 2013
National Institute of Advanced Industrial Science and Technology, Chiyoda-ku, JP;
Sanyo Electric Co., Ltd., Moriguchi-shi, JP;
Shinsuke Harada, Tsukuba, JP;
Tsutomu Yatsuo, Tsukuba, JP;
Kenji Fukuda, Tsukuba, JP;
Mitsuo Okamoto, Tsukuba, JP;
Kazuhiro Adachi, Tsukuba, JP;
Seiji Suzuki, Moriguchi, JP;
National Institute of Advanced Industrial Science and Technology, Chiyoda-ku, JP;
SANYO ELECTRIC CO., LTD., Moriguchi-shi, JP;
Abstract
A silicon carbide vertical MOSFET having low ON-resistance and high blocking voltage is provided. For this, a first deposition film () of low concentration silicon carbide of a first conductivity type is formed on the surface of a high concentration silicon carbide substrate () of a first conductivity type. Formed on the first deposition film () is a second deposition film () that comprises a high concentration gate region of a second conductivity type, with a first region removed selectively. A third deposition film () formed on the second deposition film, which comprises a second region that is wider than the selectively removed first region, a high concentration source region () of a first conductivity type and a low concentration gate region () of a second conductivity type. A low concentration base region () of a first conductivity type is formed in contact with the first deposition film () in the first and second regions.