The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 08, 2016

Filed:

Dec. 16, 2014
Applicant:

Qualcomm Incorporated, San Diego, CA (US);

Inventors:

George Patsilaras, San Diego, CA (US);

Bohuslav Rychlik, Del Mar, CA (US);

Andrew Edmund Turner, San Diego, CA (US);

Kris Tiri, San Diego, CA (US);

Jeong-Ho Woo, San Diego, CA (US);

Anwar Rohillah, San Diego, CA (US);

Feng Wang, San Diego, CA (US);

Moinul Khan, San Diego, CA (US);

Subbarao Palacharla, San Diego, CA (US);

Assignee:

QUALCOMM INCORPORATED, San Diego, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 12/00 (2006.01); G06F 12/08 (2016.01); G06F 1/32 (2006.01); G06F 13/16 (2006.01); G06F 9/46 (2006.01);
U.S. Cl.
CPC ...
G06F 12/0802 (2013.01); G06F 1/3253 (2013.01); G06F 9/467 (2013.01); G06F 12/0835 (2013.01); G06F 12/0891 (2013.01); G06F 13/16 (2013.01); G06F 12/0804 (2013.01); G06F 2212/604 (2013.01);
Abstract

Various embodiments of methods and systems for managing write transaction volume from a master component to a long term memory component in a system on a chip ('SoC') are disclosed. Because power consumption and bus bandwidth are unnecessarily consumed when ephemeral data is written back to long term memory (such as a double data rate 'DDR' memory) from a closely coupled memory component (such as a low level cache “LLC” memory) of a data generating master component, embodiments of the solutions seek to identify write transactions that contain ephemeral data and prevent the ephemeral data from being written to DDR.


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