The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Nov. 01, 2016
Filed:
Mar. 15, 2013
International Business Machines Corporation, Armonk, NY (US);
Applied Materials, Incorporated, Santa Clara, CA (US);
Mark D. Hoinkis, Fishkill, NY (US);
Eric A. Joseph, White Plains, NY (US);
Hiroyuki Miyazoe, White Plains, NY (US);
Chun Yan, San Jose, CA (US);
International Business Machines Corporation, Armonk, NY (US);
Applied Materials, Incorporated, Santa Clara, CA (US);
Abstract
A method for fabricating one or more conductive lines in an integrated circuit includes providing a layer of copper containing conductive metal in a multi-layer structure fabricated upon a wafer, providing a first hard mask layer over the layer of copper containing conductive metal, performing a first sputter etch of first hard mask layer using a chlorine-based plasma or a sulfur fluoride-based plasma, and performing a second sputter etch of first hard mask layer using a second plasma, wherein a portion of the layer of copper containing conductive metal residing below a portion of the first hard mask layer that remains after the second sputter etch forms the one or more conductive lines. In one embodiment, the second plasma is a fluorocarbon-based plasma.