The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 25, 2016

Filed:

Apr. 20, 2015
Applicant:

Intel Corporation, Santa Clara, CA (US);

Inventors:

Md Altaf Hossain, Portland, OR (US);

Jin Zhao, San Jose, CA (US);

John T. Vu, Hillsboro, OR (US);

Assignee:

INTEL CORPORATION, Santa Clara, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H05K 1/18 (2006.01); H05K 1/16 (2006.01); H05K 1/03 (2006.01); H05K 3/32 (2006.01); H05K 3/42 (2006.01); H05K 1/11 (2006.01);
U.S. Cl.
CPC ...
H05K 1/183 (2013.01); H05K 1/0326 (2013.01); H05K 1/115 (2013.01); H05K 1/162 (2013.01); H05K 1/165 (2013.01); H05K 1/167 (2013.01); H05K 3/32 (2013.01); H05K 3/42 (2013.01); H01L 2224/16225 (2013.01); H01L 2924/15311 (2013.01); H05K 1/113 (2013.01); H05K 2201/0989 (2013.01); H05K 2201/09545 (2013.01); H05K 2201/09709 (2013.01); H05K 2201/10734 (2013.01); Y10T 29/4913 (2015.01);
Abstract

Embodiments of the present disclosure are directed towards a circuit board having integrated passive devices such as inductors, capacitors, resistors and associated techniques and configurations. In one embodiment, an apparatus includes a circuit board having a first surface and a second surface opposite to the first surface and a passive device integral to the circuit board, the passive device having an input terminal configured to couple with electrical power of a die, an output terminal electrically coupled with the input terminal, and electrical routing features disposed between the first surface and the second surface of the circuit board and coupled with the input terminal and the output terminal to route the electrical power between the input terminal and the output terminal, wherein the input terminal includes a surface configured to receive a solder ball connection of a package assembly including the die. Other embodiments may be described and/or claimed.


Find Patent Forward Citations

Loading…