The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Oct. 25, 2016
Filed:
Dec. 01, 2015
Applicant:
Taiwan Semiconductor Manufacturing Company, Ltd., Hsin-Chu, TW;
Inventors:
Hsiu-Jung Yen, Shuishang Township, TW;
Jen-Pan Wang, Tainan, TW;
Assignee:
Taiwan Semiconductor Manufacturing Company, Ltd., Hsin-Chu, TW;
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/336 (2006.01); H01L 21/8234 (2006.01); H01L 21/28 (2006.01); H01L 29/49 (2006.01); H01L 29/66 (2006.01); H01L 49/02 (2006.01); H01L 27/06 (2006.01); H01L 21/306 (2006.01); H01L 21/31 (2006.01); H01L 21/3205 (2006.01); H01L 21/321 (2006.01); H01L 21/3213 (2006.01); H01L 21/768 (2006.01); H01L 21/02 (2006.01); H01L 21/311 (2006.01); H01L 29/51 (2006.01);
U.S. Cl.
CPC ...
H01L 21/8234 (2013.01); H01L 21/02164 (2013.01); H01L 21/02181 (2013.01); H01L 21/02192 (2013.01); H01L 21/02271 (2013.01); H01L 21/28088 (2013.01); H01L 21/30604 (2013.01); H01L 21/31 (2013.01); H01L 21/31111 (2013.01); H01L 21/3212 (2013.01); H01L 21/32051 (2013.01); H01L 21/32133 (2013.01); H01L 21/76895 (2013.01); H01L 21/823437 (2013.01); H01L 21/823462 (2013.01); H01L 21/823468 (2013.01); H01L 21/823475 (2013.01); H01L 27/0629 (2013.01); H01L 28/20 (2013.01); H01L 28/24 (2013.01); H01L 29/49 (2013.01); H01L 29/4966 (2013.01); H01L 29/66545 (2013.01); H01L 29/66583 (2013.01); H01L 29/517 (2013.01);
Abstract
A method comprises removing a dummy gate electrode layer to form a gate trench in a dielectric layer over a substrate, forming a resistor trench over the substrate, depositing a plurality of films on a bottom of the gate trench, a bottom of the resistor trench, sidewalls of the gate trench and sidewalls of the resistor trench, depositing a gate electrode layer over the plurality of films and removing an upper portion of the gate electrode layer until the gate electrode layer is removed from the resistor trench.