The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 25, 2016

Filed:

Mar. 06, 2015
Applicant:

Mitsubishi Electric Corporation, Tokyo, JP;

Inventors:

Atsushi Era, Tokyo, JP;

Akihito Ohno, Tokyo, JP;

Takahiro Yamamoto, Tokyo, JP;

Assignee:
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 21/338 (2006.01); H01L 21/02 (2006.01); H01L 29/66 (2006.01); H01L 29/778 (2006.01); H01L 29/207 (2006.01);
U.S. Cl.
CPC ...
H01L 21/02458 (2013.01); H01L 21/0254 (2013.01); H01L 21/0262 (2013.01); H01L 21/02378 (2013.01); H01L 21/02502 (2013.01); H01L 21/02581 (2013.01); H01L 29/66462 (2013.01); H01L 29/7786 (2013.01); H01L 29/207 (2013.01);
Abstract

A method of manufacturing a semiconductor element includes a first step of epitaxially growing an AlN layer on a substrate, a second step of forming a buffer layer on the AlN layer by epitaxially growing AlGaInN where x, y, and z satisfy x+y+z=1 and y is not zero without adding Fe, a third step of forming a resistance layer on the buffer layer by epitaxially growing AlGaInN where x, y, and z satisfy x+y+z=1 and y is not zero while adding Fe, a step of epitaxially growing a channel layer on the resistance layer, a step of epitaxially growing an electron supply layer above the channel layer, and a step of forming an electrode above the electron supply layer.


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