The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 25, 2016

Filed:

Sep. 28, 2013
Applicant:

Intel Corporation, Santa Clara, CA (US);

Inventors:

Allan D. Knies, Burlingame, CA (US);

David Pardo Keppel, Seattle, WA (US);

Dong Hyuk Woo, Campbell, CA (US);

Joshua B. Fryman, Corvallis, OR (US);

Assignee:

Intel Corporation, Santa Clara, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 15/00 (2006.01); G06F 13/40 (2006.01); G06F 15/173 (2006.01); G06F 9/52 (2006.01); G06F 13/14 (2006.01);
U.S. Cl.
CPC ...
G06F 13/4068 (2013.01); G06F 9/52 (2013.01); G06F 15/17318 (2013.01); G06F 15/17325 (2013.01);
Abstract

A collective communication apparatus and method for parallel computing systems. For example, one embodiment of an apparatus comprises a plurality of processor elements (PEs); collective interconnect logic to dynamically form a virtual collective interconnect (VCI) between the PEs at runtime without global communication among all of the PEs, the VCI defining a logical topology between the PEs in which each PE is directly communicatively coupled to a only a subset of the remaining PEs; and execution logic to execute collective operations across the PEs, wherein one or more of the PEs receive first results from a first portion of the subset of the remaining PEs, perform a portion of the collective operations, and provide second results to a second portion of the subset of the remaining PEs.


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