The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Oct. 18, 2016
Filed:
Sep. 24, 2015
Qualcomm Incorporated, San Diego, CA (US);
Harshat Pant, San Diego, CA (US);
Ramaprasath Vilangudipitchai, San Diego, CA (US);
Divjyot Bhan, Encinitas, CA (US);
Lipeng Cao, La Jolla, CA (US);
Sai Pradeep Kochuri, San Diego, CA (US);
Parissa Najdesamii, San Diego, CA (US);
QUALCOMM Incorporated, San Diego, CA (US);
Abstract
An integrated circuit (IC) is disclosed herein for managing power with flip-flops having a retention feature. In an example aspect, an IC includes a constant power rail, a collapsible power rail, multiple flip-flops, and power management circuitry. Each flip-flop of the multiple flip-flops includes a master portion that is coupled to the collapsible power rail and a slave portion that is coupled to the constant power rail. The power management circuitry is configured to combine a clock signal and a retention signal into a combined control signal and to provide the combined control signal to each flip-flop of the multiple flip-flops.