The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Oct. 18, 2016
Filed:
Jun. 27, 2011
Applicants:
Xiaowei Deng, Plano, TX (US);
Wah Kit Loh, Richardson, TX (US);
Inventors:
Xiaowei Deng, Plano, TX (US);
Wah Kit Loh, Richardson, TX (US);
Assignee:
TEXAS INSTRUMENTS INCORPORATED, Dallas, TX (US);
Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
G11C 11/00 (2006.01); G11C 11/419 (2006.01); G11C 8/16 (2006.01); G11C 29/02 (2006.01); G11C 11/41 (2006.01);
U.S. Cl.
CPC ...
G11C 11/419 (2013.01); G11C 8/16 (2013.01); G11C 29/022 (2013.01); G11C 11/41 (2013.01);
Abstract
An SRAM with buffered-read bit cells is disclosed (FIGS.-). The integrated circuit includes a plurality of memory cells (). Each memory cell has a plurality of transistors (). A first memory cell (FIG.) is arranged to store a data signal in response to an active write word line (WWL) and to produce the data signal in response to an active read word line (RWL). A test circuit () formed on the integrated circuit is operable to test current and voltage characteristics of each transistor of the plurality of transistors of the first memory cell (FIGS.-).