The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Oct. 18, 2016
Filed:
Sep. 27, 2013
Applicant:
Intel Corporation, Santa Clara, CA (US);
Inventors:
Vasudev Bibikar, Austin, TX (US);
Rajith K. Mavila, Austin, TX (US);
Assignee:
INTEL CORPORATION, Santa Clara, CA (US);
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F 1/26 (2006.01); G06F 1/32 (2006.01);
U.S. Cl.
CPC ...
G06F 1/3234 (2013.01); G06F 1/3243 (2013.01); G06F 1/3287 (2013.01); G06F 1/3203 (2013.01); Y02B 60/1239 (2013.01); Y02B 60/1282 (2013.01); Y02B 60/32 (2013.01);
Abstract
Various embodiments are generally directed to an apparatus, method and other techniques for determining a sleep configuration state for each of a plurality of subsystems having an associated subsystem sleep control register for entry into a lower power state, configuring each of the associated subsystem sleep control registers with the sleep configuration state for each of the subsystems and enabling the sleep configuration state for each of the subsystems in parallel when transitioning to the lower power state.