The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Sep. 20, 2016
Filed:
Jul. 29, 2011
Fanling Hsu Yang, Beaverton, OR (US);
Timothy K. Mcguire, Beaverton, OR (US);
Sudarsan Uppili, Portland, OR (US);
Guillaume Bouche, Beaverton, OR (US);
Fanling Hsu Yang, Beaverton, OR (US);
Timothy K. McGuire, Beaverton, OR (US);
Sudarsan Uppili, Portland, OR (US);
Guillaume Bouche, Beaverton, OR (US);
Maxim Integrated Products, Inc., San Jose, CA (US);
Abstract
Semiconductor devices, such as laterally diffused metal oxide semiconductor (LDMOS) devices, are described that have a field plate connected to a gate of the device. In one or more implementations, the semiconductor devices include a substrate having a source region of a first conductivity type and a drain region of the first conductivity type. A gate is positioned over the surface and between the source region and the drain region. The gate is configured to receive a voltage so that a conduction region may be formed at least partially below the gate to allow majority carriers to travel between the source region and the drain region. The device also includes a field plate at least partially positioned over and connected to the gate. The field plate is configured to shape an electrical field generated between the source region and the drain region when a voltage is applied to the gate.