The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 20, 2016

Filed:

Mar. 14, 2013
Applicant:

Fuji Electric Co., Ltd., Kawasaki-shi, Kanagawa, JP;

Inventors:

Noriyuki Iwamuro, Tsukuba, JP;

Shinsuke Harada, Tsukuba, JP;

Yasuyuki Hoshi, Matsumoto, JP;

Yuichi Harada, Matsumoto, JP;

Assignee:

FUJI ELECTRIC CO., LTD., Kawasaki-shi, JP;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 29/15 (2006.01); H01L 29/10 (2006.01); H01L 29/16 (2006.01); H01L 29/66 (2006.01); H01L 29/06 (2006.01); H01L 29/78 (2006.01); H01L 21/04 (2006.01); H01L 29/04 (2006.01); H01L 29/872 (2006.01); H01L 29/868 (2006.01); H01L 29/08 (2006.01);
U.S. Cl.
CPC ...
H01L 29/1095 (2013.01); H01L 21/046 (2013.01); H01L 21/049 (2013.01); H01L 29/045 (2013.01); H01L 29/0619 (2013.01); H01L 29/0661 (2013.01); H01L 29/1608 (2013.01); H01L 29/6606 (2013.01); H01L 29/66068 (2013.01); H01L 29/7811 (2013.01); H01L 29/0878 (2013.01); H01L 29/868 (2013.01); H01L 29/872 (2013.01);
Abstract

A vertical high voltage semiconductor apparatus includes a first conductivity semiconductor substrate; a first conductivity semiconductor layer disposed on the semiconductor substrate and having an impurity concentration lower than the semiconductor substrate; a second conductivity semiconductor layer disposed on the first conductivity semiconductor layer; a second conductivity base layer disposed on the first conductivity semiconductor layer and the second conductivity semiconductor layer and, having an impurity concentration lower than the second conductivity semiconductor layer; and a first conductivity source region selectively disposed inside the base layer. In an edge termination portion, after a region of the second conductivity semiconductor layer is removed, in the first conductivity semiconductor layer having an impurity concentration lower than that of the semiconductor substrate, second conductivity layers having a low concentration are formed such that the second conductivity layer at the innermost perimeter, the second conductivity semiconductor layer, and the base layer do not contact.


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