The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 20, 2016

Filed:

May. 07, 2014
Applicant:

Qualcomm Incorporated, San Diego, CA (US);

Inventors:

Young Kyu Song, San Diego, CA (US);

Kyu-Pyung Hwang, San Diego, CA (US);

Dong Wook Kim, San Diego, CA (US);

Xiaonan Zhang, San Diego, CA (US);

Ryan David Lane, San Diego, CA (US);

Assignee:

QUALCOMM Incorporated, San Diego, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H05K 1/03 (2006.01); H01G 4/236 (2006.01); H01G 2/02 (2006.01); H05K 1/18 (2006.01); H05K 1/11 (2006.01); H01G 4/30 (2006.01); H01G 4/33 (2006.01); H01G 4/40 (2006.01); H01G 4/224 (2006.01); H05K 3/46 (2006.01); H01G 2/10 (2006.01); H05K 1/02 (2006.01);
U.S. Cl.
CPC ...
H01G 4/236 (2013.01); H01G 2/02 (2013.01); H01G 4/224 (2013.01); H01G 4/30 (2013.01); H01G 4/33 (2013.01); H01G 4/40 (2013.01); H05K 1/115 (2013.01); H05K 1/182 (2013.01); H05K 1/185 (2013.01); H01G 2/106 (2013.01); H05K 1/0231 (2013.01); H05K 3/4644 (2013.01); H05K 3/4697 (2013.01); H05K 2201/10015 (2013.01); Y10T 29/42 (2015.01);
Abstract

Some novel features pertain to package substrates that include a substrate having an embedded package substrate (EPS) capacitor with equivalent series resistance (ESR) control. The EPS capacitor includes two conductive electrodes separated by a dielectric or insulative thin film material and an equivalent series resistance (ESR) control structure located on top of each electrode connecting the electrodes to vias. The ESR control structure may include a metal layer, a dielectric layer, and a set of metal pillars which are embedded in the set of metal pillars are embedded in the dielectric layer and extend between the electrode and the metal layer. The EPS capacitor having the ESR control structure form an ESR configurable EPS capacitor which can be embedded in package substrates.


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