The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 20, 2016

Filed:

Mar. 20, 2015
Applicant:

Diablo Technologies Inc., Ottawa, CA;

Inventors:

Michael L. Takefman, Nepean, CA;

Maher Amer, Nepean, CA;

Claus Reitlingshoefer, Kanata, CA;

Assignee:
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G11C 7/10 (2006.01); G11C 7/22 (2006.01); G11C 5/04 (2006.01);
U.S. Cl.
CPC ...
G11C 5/04 (2013.01); G11C 7/1066 (2013.01); G11C 7/1093 (2013.01);
Abstract

A system and method for offsetting the data buffer latency in a CPIO device having a JEDEC standard DDR-4 LRDIMM chipset as the front end is disclosed. According to one embodiment, a CPIO ASIC provides variable timing control for its DDR-4 LRDIMM interface such that propagation delay of the data buffers can be offset by the CPIO ASIC, allowing the CPIO LRDIMM to be timing compatible with an RDIMM.


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