The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 13, 2016

Filed:

May. 15, 2009
Applicants:

Li-ping Yang, Taipei, TW;

Pi-cheng Chen, Hsin Chu, TW;

Han-chang Kang, Hsin-Chu, TW;

Ran-hong Yan, Holmdel, NJ (US);

Inventors:

Li-Ping Yang, Taipei, TW;

Pi-Cheng Chen, Hsin Chu, TW;

Han-Chang Kang, Hsin-Chu, TW;

Ran-Hong Yan, Holmdel, NJ (US);

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 27/02 (2006.01);
U.S. Cl.
CPC ...
H01L 27/0207 (2013.01);
Abstract

A method of fabricating integrated circuits includes the steps of: a) with reference to a physical design of a hardware unit, preparing an integrated circuit component mask layout set associated with component photomasks suitable for fabricating an array of the hardware units on a wafer; b) preparing the component photomasks with reference to the integrated circuit component mask layout set; c) forming the array of the hardware units and interconnections between adjacent hardware units on the wafer using the component photomasks prepared in step b) ; and d) cutting the wafer along selected ones of the scribe lines so as to form a plurality of integrated circuit dies. Each of the integrated circuit dies is independently selected from a single-type including only one of the hardware units, and a multi-type including a plurality of the hardware units that are interconnected electrically via uncut ones of the conductive paths.


Find Patent Forward Citations

Loading…