The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Sep. 13, 2016
Filed:
Nov. 17, 2014
Applicant:
Infineon Technologies Ag, Neubiberg, DE;
Inventors:
Assignee:
INFINEON TECHNOLOGIES AG, Neubiberg, DE;
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/00 (2006.01); H01L 21/768 (2006.01); H01L 23/13 (2006.01); H01L 23/433 (2006.01); H01L 23/495 (2006.01); H01L 23/00 (2006.01); H01L 23/498 (2006.01); H01L 25/07 (2006.01); H01L 25/00 (2006.01); H01L 23/31 (2006.01);
U.S. Cl.
CPC ...
H01L 21/76877 (2013.01); H01L 21/76816 (2013.01); H01L 23/13 (2013.01); H01L 23/4334 (2013.01); H01L 23/49513 (2013.01); H01L 23/49517 (2013.01); H01L 23/49524 (2013.01); H01L 23/49562 (2013.01); H01L 23/49575 (2013.01); H01L 23/49833 (2013.01); H01L 24/24 (2013.01); H01L 24/40 (2013.01); H01L 24/48 (2013.01); H01L 24/73 (2013.01); H01L 24/82 (2013.01); H01L 24/92 (2013.01); H01L 25/072 (2013.01); H01L 25/50 (2013.01); H01L 23/3107 (2013.01); H01L 24/05 (2013.01); H01L 24/29 (2013.01); H01L 24/32 (2013.01); H01L 24/35 (2013.01); H01L 24/37 (2013.01); H01L 24/41 (2013.01); H01L 24/49 (2013.01); H01L 2224/04026 (2013.01); H01L 2224/04034 (2013.01); H01L 2224/05624 (2013.01); H01L 2224/05639 (2013.01); H01L 2224/05644 (2013.01); H01L 2224/05647 (2013.01); H01L 2224/05655 (2013.01); H01L 2224/05664 (2013.01); H01L 2224/05666 (2013.01); H01L 2224/05669 (2013.01); H01L 2224/05671 (2013.01); H01L 2224/224 (2013.01); H01L 2224/2402 (2013.01); H01L 2224/24011 (2013.01); H01L 2224/24105 (2013.01); H01L 2224/24155 (2013.01); H01L 2224/24175 (2013.01); H01L 2224/291 (2013.01); H01L 2224/2919 (2013.01); H01L 2224/29111 (2013.01); H01L 2224/29139 (2013.01); H01L 2224/29144 (2013.01); H01L 2224/29147 (2013.01); H01L 2224/29294 (2013.01); H01L 2224/29311 (2013.01); H01L 2224/29339 (2013.01); H01L 2224/29344 (2013.01); H01L 2224/29347 (2013.01); H01L 2224/29355 (2013.01); H01L 2224/32225 (2013.01); H01L 2224/32245 (2013.01); H01L 2224/35 (2013.01); H01L 2224/352 (2013.01); H01L 2224/3701 (2013.01); H01L 2224/3716 (2013.01); H01L 2224/37113 (2013.01); H01L 2224/37118 (2013.01); H01L 2224/37139 (2013.01); H01L 2224/37144 (2013.01); H01L 2224/37147 (2013.01); H01L 2224/37155 (2013.01); H01L 2224/37164 (2013.01); H01L 2224/37169 (2013.01); H01L 2224/40095 (2013.01); H01L 2224/40155 (2013.01); H01L 2224/40175 (2013.01); H01L 2224/40245 (2013.01); H01L 2224/40499 (2013.01); H01L 2224/41171 (2013.01); H01L 2224/48155 (2013.01); H01L 2224/48175 (2013.01); H01L 2224/49171 (2013.01); H01L 2224/73263 (2013.01); H01L 2224/73265 (2013.01); H01L 2224/73267 (2013.01); H01L 2224/82104 (2013.01); H01L 2224/82105 (2013.01); H01L 2224/82106 (2013.01); H01L 2224/83447 (2013.01); H01L 2224/83801 (2013.01); H01L 2224/83851 (2013.01); H01L 2224/84447 (2013.01); H01L 2224/92244 (2013.01); H01L 2224/92246 (2013.01); H01L 2224/92247 (2013.01); H01L 2924/00014 (2013.01); H01L 2924/014 (2013.01); H01L 2924/12042 (2013.01); H01L 2924/1305 (2013.01); H01L 2924/1306 (2013.01); H01L 2924/13055 (2013.01); H01L 2924/13062 (2013.01); H01L 2924/13091 (2013.01); H01L 2924/15787 (2013.01); H01L 2924/181 (2013.01);
Abstract
An electronic device includes a first chip carrier and a second chip carrier isolated from the first chip carrier. A first power semiconductor chip is mounted on and electrically connected to the first chip carrier. A second power semiconductor chip is mounted on and electrically connected to the second chip carrier. An electrically insulating material is configured to at least partially surround the first power semiconductor chip and the second power semiconductor chip. An electrical interconnect is configured to electrically connect the first power semiconductor chip to the second power semiconductor chip, wherein the electrical interconnect has at least one of a contact clip and a galvanically deposited conductor.