The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 13, 2016

Filed:

Nov. 12, 2015
Applicant:

United Microelectronics Corp., Hsin-Chu, TW;

Inventors:

Ming-Yueh Tsai, Taichung, TW;

Jia-Feng Fang, Changhua County, TW;

Yi-Wei Chen, Taichung, TW;

Jing-Yin Jhang, Tainan, TW;

Rung-Yuan Lee, New Taipei, TW;

Chen-Yi Weng, New Taipei, TW;

Wei-Jen Wu, Tainan, TW;

Assignee:
Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
H01L 29/78 (2006.01); H01L 21/768 (2006.01); H01L 29/161 (2006.01); H01L 29/16 (2006.01); H01L 29/165 (2006.01); H01L 29/08 (2006.01); H01L 23/535 (2006.01); H01L 29/66 (2006.01);
U.S. Cl.
CPC ...
H01L 21/76829 (2013.01); H01L 21/76895 (2013.01); H01L 23/535 (2013.01); H01L 29/0847 (2013.01); H01L 29/161 (2013.01); H01L 29/165 (2013.01); H01L 29/1608 (2013.01); H01L 29/66795 (2013.01); H01L 29/7848 (2013.01); H01L 29/7851 (2013.01);
Abstract

A method for fabricating semiconductor device is disclosed. The method includes the steps of: providing a substrate having a fin-shaped structure thereon; forming an epitaxial layer on the fin-shaped structure; forming a first contact etch stop layer (CESL) on the epitaxial layer; forming a source/drain region in the epitaxial layer; and forming a second CESL on the first CESL.


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