The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 06, 2016

Filed:

Jan. 14, 2014
Applicant:

Intel Corporation, Santa Clara, CA (US);

Inventors:

Paolo Madoglio, Beaverton, OR (US);

Stefano Pellerano, Beaverton, OR (US);

Assignee:

Intel Corporation, Santa Clara, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 1/04 (2006.01); H03M 1/82 (2006.01); G06F 1/08 (2006.01); H03M 1/08 (2006.01); H03M 1/66 (2006.01); H03K 5/13 (2014.01); H03L 7/16 (2006.01); H03K 5/00 (2006.01);
U.S. Cl.
CPC ...
H03M 1/822 (2013.01); G06F 1/08 (2013.01); H03K 5/131 (2013.01); H03M 1/0836 (2013.01); H03M 1/662 (2013.01); G06F 1/04 (2013.01); H03K 2005/00045 (2013.01); H03L 7/16 (2013.01);
Abstract

Representative implementations of devices and techniques provide a phase multiplexer that may be associated with at least a communication device. The described phase multiplexer may be able to switch between input phases without distorting a pulse width of a given input phase. In one implementation, this is achieved by enabling one phase at a time. More specifically, a gating window specific for each given phase is provided. The gating window is designed to avoid glitches associated with signals at an output of the phase multiplexer. Furthermore, the gating window is designed to avoid the generation of pulse width modifications.


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