The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 06, 2016

Filed:

Feb. 29, 2012
Applicants:

Patrice Besse, Tournefeuille, FR;

Jerome Casters, Toulouse, FR;

Jean-philippe Laine, Cugnaux, FR;

Alain Salles, Ramonville St Agne, FR;

Inventors:

Patrice Besse, Tournefeuille, FR;

Jerome Casters, Toulouse, FR;

Jean-Philippe Laine, Cugnaux, FR;

Alain Salles, Ramonville St Agne, FR;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H02H 3/22 (2006.01); H02H 9/02 (2006.01); H02M 7/5387 (2007.01); H05K 1/02 (2006.01); H01L 27/02 (2006.01); H02H 9/04 (2006.01);
U.S. Cl.
CPC ...
H02H 9/02 (2013.01); H02H 9/042 (2013.01); H01L 27/0266 (2013.01); H02H 9/046 (2013.01); H02M 7/5387 (2013.01); H05K 1/0259 (2013.01);
Abstract

An electrostatic discharge, ESD, protection circuit arrangement is connectable to a first pin and a second pin of an electronic circuit and arranged to at least partly absorb an ESD current entering the electronic circuit through at least one of the first pin or the second pin during an ESD stress event. The protection circuit arrangement comprises a first ESD protection circuit arranged to absorb a first portion of the ESD current during a first part of the ESD stress event during which first part a level of the ESD current exceeds a predetermined current threshold; and a second ESD protection circuit arranged to absorb a second portion of the ESD current, the second portion having a current level below the current threshold, at least during a second part of the ESD stress event. The second ESD protection circuit comprises a current limiting circuit arranged to limit a current through at least a portion of the second ESD protection circuit to the current threshold.


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