The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Sep. 06, 2016
Filed:
Apr. 28, 2015
Powerchip Technology Corporation, Hsinchu, TW;
Chih-Ping Chung, Hsinchu, TN (US);
Ming-Yu Ho, Taichung, TW;
Ming-Feng Chang, Taichung, TW;
Hung-Kwei Liao, Taoyuan, TW;
Powerchip Technology Corporation, Hsinchu, TW;
Abstract
A manufacturing method of a non-volatile memory is provided. A tunneling dielectric layer, a first conductive pattern, and isolation structures are formed on a substrate. Using a first photoresist layer as a mask, the first conductive pattern is partially removed to form a first opening exposing the substrate. An insulating layer is formed to fill the first opening and cover the first conductive pattern and the isolation structures. Using a second photoresist layer shielding a portion of the first conductive pattern as a mask, the insulating layer surrounding the first conductive pattern is removed to form a patterned insulating layer having a second opening exposing a portion of the first conductive pattern. An inter-gate dielectric layer and a second conductive pattern are formed on the first conductive pattern to fill the second opening, the first conductive pattern forms a floating gate, and the second conductive pattern forms a control gate.