The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 30, 2016

Filed:

Jul. 24, 2015
Applicant:

Taiwan Semiconductor Manufacturing Company, Ltd., Hsin-Chu, TW;

Inventors:

Wei-Yuan Lu, Taipei, TW;

Kuan-Chung Chen, Taipei, TW;

Chun-Fai Cheng, Tin Shui Wai, HK;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 27/11 (2006.01); H01L 27/092 (2006.01); H01L 29/06 (2006.01); H01L 29/49 (2006.01); H01L 29/51 (2006.01); H01L 21/8238 (2006.01); H01L 21/28 (2006.01); H01L 29/66 (2006.01); H01L 29/78 (2006.01);
U.S. Cl.
CPC ...
H01L 27/11 (2013.01); H01L 21/28176 (2013.01); H01L 21/823842 (2013.01); H01L 21/823857 (2013.01); H01L 27/0922 (2013.01); H01L 27/1104 (2013.01); H01L 29/0649 (2013.01); H01L 29/4966 (2013.01); H01L 29/511 (2013.01); H01L 29/517 (2013.01); H01L 29/66545 (2013.01); H01L 29/7827 (2013.01);
Abstract

A semiconductor device includes a dielectric layer on a substrate, a P-type transistor having a first gate stack embedded in the dielectric layer, and an N-type transistor having a second gate stack embedded in the dielectric layer. The first gate stack includes a first metal gate electrode, a first gate dielectric layer underlying the first metal gate electrode, and a first cap layer between the first gate dielectric layer and the first metal gate electrode. The second gate stack includes a second metal gate electrode, a second gate dielectric layer underlying the second metal gate electrode, and a second cap layer between the second gate dielectric layer and the second metal gate electrode. The first and second gate stacks are adjacent, and the first and second metal gate electrodes are separated from each other by the first and second cap layers.


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