The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 30, 2016

Filed:

May. 06, 2015
Applicant:

International Business Machines Corporation, Armonk, NY (US);

Inventors:

Mario J. Interrante, New Paltz, NY (US);

Katsuyuki Sakuma, Fishkill, NY (US);

Attorneys:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 23/00 (2006.01); H01L 21/56 (2006.01); H01L 23/498 (2006.01); H01L 21/48 (2006.01);
U.S. Cl.
CPC ...
H01L 24/81 (2013.01); H01L 21/4853 (2013.01); H01L 21/563 (2013.01); H01L 23/49811 (2013.01); H01L 23/562 (2013.01); H01L 24/17 (2013.01); H01L 2224/16113 (2013.01); H01L 2224/16238 (2013.01); H01L 2224/8121 (2013.01); H01L 2224/81815 (2013.01); H01L 2924/01006 (2013.01); H01L 2924/01013 (2013.01); H01L 2924/01029 (2013.01); H01L 2924/2064 (2013.01); H01L 2924/20641 (2013.01); H01L 2924/20642 (2013.01); H01L 2924/20643 (2013.01); H01L 2924/20644 (2013.01); H01L 2924/20645 (2013.01);
Abstract

A method of forming a 3D package. The method may include joining an interposer to a laminate chip carrier with the solid state diffusion of a first plurality of solder bumps by applying a first selective non-uniform heat and first uniform pressure; joining a top chip to the interposer with the solid state diffusion of a second plurality of solder bumps by applying a second selective non-uniform heat and second uniform pressure; heating the 3D package, the first and second pluralities of solder bumps to a temperature greater than the reflow temperature of the first and second pluralities of solder bumps, where the second plurality of solder bumps achieves the reflow temperature before the first plurality of solder bumps, where the first and second selective non-uniform heats being less that the reflow temperature of the first and second pluralities of solder bumps, respectively.


Find Patent Forward Citations

Loading…