The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 30, 2016

Filed:

Jan. 05, 2015
Applicant:

Lam Research Corporation, Fremont, CA (US);

Inventors:

Thorsten Lill, Santa Clara, CA (US);

Ivan L. Berry, III, San Jose, CA (US);

Meihua Shen, Fremont, CA (US);

Alan M. Schoepp, Ben Lomond, CA (US);

David J. Hemker, San Jose, CA (US);

Assignee:

Lam Research Corporation, Fremont, CA (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 21/302 (2006.01); H01L 21/311 (2006.01); H01J 37/32 (2006.01); C23C 16/52 (2006.01); C23C 16/50 (2006.01); C23C 16/458 (2006.01);
U.S. Cl.
CPC ...
H01L 21/31116 (2013.01); C23C 16/458 (2013.01); C23C 16/50 (2013.01); C23C 16/52 (2013.01); H01J 37/32009 (2013.01); H01J 37/32449 (2013.01); H01J 37/32715 (2013.01);
Abstract

Methods for controlled isotropic etching of layers of silicon oxide and germanium oxide with atomic scale fidelity are provided. The methods make use of a reaction of anhydrous HF with an activated surface of an oxide, with an emphasis on removal of water generated in the reaction. In certain embodiments the oxide surface is first modified by adsorbing an OH-containing species (e.g., an alcohol) or by forming OH bonds using a hydrogen-containing plasma. The activated oxide is then etched by a separately introduced anhydrous HF, while the water generated in the reaction is removed from the surface of the substrate as the reaction proceeds, or at any time during or after the reaction. These methods may be used in interconnect pre-clean applications, gate dielectric processing, manufacturing of memory devices, or any other applications where accurate removal of one or multiple atomic layers of material is desired.


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