The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Patent No.:

US 9430389 B1

PDF
Full Text
Expired
Date of Patent:
Aug. 30, 2016

Filed:

Dec. 22, 2011
Applicants:

Jesus Corbal, Barcelona, ES;

Lisa K. Wu, New York, NY (US);

George Z. Chrysos, Portland, OR (US);

Andrew T. Forsyth, Kirkland, WA (US);

Ramacharan Sundararaman, Hillsboro, OR (US);

Inventors:

Jesus Corbal, Barcelona, ES;

Lisa K. Wu, New York, NY (US);

George Z. Chrysos, Portland, OR (US);

Andrew T. Forsyth, Kirkland, WA (US);

Ramacharan Sundararaman, Hillsboro, OR (US);

Assignee:

Intel Corporation, Santa Clara, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 3/00 (2006.01); G06F 12/08 (2016.01); G06F 9/30 (2006.01);
U.S. Cl.
CPC ...
G06F 12/0815 (2013.01); G06F 9/30047 (2013.01); G06F 12/0811 (2013.01); G06F 12/0862 (2013.01);
Abstract

A method performed by a processor is described. The method includes executing an instruction. The instruction has an address as an operand. The executing of the instruction includes sending a signal to cache coherence protocol logic of the processor. In response to the signal, the cache coherence protocol logic issues a request for ownership of a cache line at the address. The cache line is not in a cache of the processor. The request for ownership also indicates that the cache line is not to be sent to the processor.


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