The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 30, 2016

Filed:

Jan. 24, 2013
Applicant:

Ltx-credence Corporation, Norwood, MA (US);

Inventors:

William A. Fritzsche, Morgan Hill, CA (US);

Jeffery D. Currin, Livermore, CA (US);

Russell Elliott Poffenberger, Discovery Bay, CA (US);

Timothy Alton, Gilroy, CA (US);

Michael Gordon Davis, San Jose, CA (US);

Assignee:

Xcerra Corporation, Norwood, MA (US);

Attorneys:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F 11/273 (2006.01); G06F 11/263 (2006.01); G06F 11/22 (2006.01);
U.S. Cl.
CPC ...
G06F 11/273 (2013.01); G06F 11/2294 (2013.01); G06F 11/263 (2013.01); G06F 11/2733 (2013.01);
Abstract

A scalable test platform includes a PCIe-based event fabric. One or more CPU subsystems are coupled to the PCIe-based event fabric and configured to execute an automated test process. One or more instrument subsystems are coupled to the PCIe-based event fabric and configured to interface one or more devices under test.


Find Patent Forward Citations

Fritzsche, William. (2016). Scalable test platform in a pci express environment with direct memory access (U.S. Patent No. 9430348). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/9430348

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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