The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Aug. 16, 2016
Filed:
Nov. 18, 2013
Taiwan Semiconductor Manufacturing Company Limited, Hsin-Chu, TW;
Chen-Ting Ko, Hsinchu, TW;
Taiwan Semiconductor Manufacturing Company Limited, Hsin-Chu, TW;
Abstract
Among other things, one or more stacked semiconductor arrangements or techniques for applying voltage schemes to such stacked semiconductor arrangements is provided. A stacked semiconductor arrangement comprises one or more tiers, such as a first tier comprising a first semiconductor structure, a second tier comprising a second semiconductor structure, or other tiers. A first voltage domain is applied to the first tier, such as a first substrate voltage of 0v and a first power voltage of 1.6v. A second voltage domain is applied to the second tier, such as a second substrate voltage of 1.6v and a second power voltage of 3.3v. In this way, semiconductor structures having different operational voltages are separated into different tiers, such as to mitigate damage to a lower voltage integrated circuit from a relatively higher voltage for a higher voltage integrated circuit.