The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 16, 2016

Filed:

Apr. 01, 2015
Applicant:

Subtron Technology Co., Ltd., Hsinchu County, TW;

Inventor:

Chien-Ming Chen, Hsinchu County, TW;

Assignee:

Subtron Technology Co., Ltd., Hsinchu County, TW;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 23/52 (2006.01); H01L 23/522 (2006.01); H01L 21/768 (2006.01); H01L 21/56 (2006.01); H01L 23/29 (2006.01);
U.S. Cl.
CPC ...
H01L 23/5226 (2013.01); H01L 21/568 (2013.01); H01L 21/76877 (2013.01); H01L 23/293 (2013.01);
Abstract

A manufacturing method of a package structure includes the following steps. A substrate including a core layer, first and second patterned metal layers is provided. The first and second patterned metal layers are respectively disposed on two opposite surfaces of the core layer. A through cavity penetrating the substrate is formed. The substrate is disposed on a tape carrier. A semiconductor component is disposed in the through cavity. An inner wall of the through cavity and a side surface of the semiconductor component define a groove. The filling compound is dispensed above the groove. A heating process is performed for the filling compound to flow toward the tape carrier and comprehensively fill the groove. First and second stacked layers are respectively laminated onto the first and second patterned metal layers and cover at least a part of the semiconductor component.


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