The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 09, 2016

Filed:

Sep. 19, 2014
Applicant:

Sandisk Technologies Inc., Plano, TX (US);

Inventors:

Seiji Shimabukuro, Yokkaichi, JP;

Ryoichi Honma, Yokkaichi, JP;

Hiroyuki Ogawa, Yokkaichi, JP;

Yuki Mizutani, San Jose, CA (US);

Fumiaki Toyama, Cupertino, CA (US);

Assignee:

SANDISK TECHNOLOGIES LLC, Plano, TX (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 16/04 (2006.01); H01L 27/115 (2006.01); H01L 21/768 (2006.01); H01L 23/528 (2006.01); H01L 29/788 (2006.01); H01L 29/06 (2006.01); H01L 29/66 (2006.01); G11C 5/02 (2006.01); H01L 29/792 (2006.01);
U.S. Cl.
CPC ...
H01L 27/11524 (2013.01); H01L 27/1157 (2013.01); H01L 27/11565 (2013.01); H01L 27/11575 (2013.01); H01L 27/11582 (2013.01); H01L 29/66825 (2013.01); H01L 29/66833 (2013.01); G11C 5/02 (2013.01); G11C 16/0408 (2013.01); G11C 16/0483 (2013.01); G11C 2213/71 (2013.01); H01L 27/11519 (2013.01); H01L 27/11551 (2013.01); H01L 27/11556 (2013.01); H01L 29/7889 (2013.01); H01L 29/7926 (2013.01);
Abstract

A monolithic three dimensional memory device includes a semiconductor substrate having a major surface and a doped well region of a first conductivity type extending substantially parallel to the major surface of the semiconductor substrate, a plurality of NAND memory strings extending substantially perpendicular to the major surface of the semiconductor substrate, and a plurality of substantially pillar-shaped support members extending substantially perpendicular to the major surface of the semiconductor substrate, each support member including an electrically insulating outer material surrounding an electrically conductive core material that extends substantially perpendicular to the major surface of the semiconductor substrate and electrically contacting the doped well region.


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