The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 09, 2016

Filed:

Jun. 24, 2014
Applicant:

Fujitsu Semiconductor Limited, Yokohama-shi, Kanagawa, JP;

Inventor:

Kenichi Watanabe, Yokohama, JP;

Assignee:

SOCIONEXT INC., Yokohama, JP;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 23/522 (2006.01); H01L 23/532 (2006.01); H01L 23/58 (2006.01); H01L 29/06 (2006.01); H01L 23/528 (2006.01); H01L 23/485 (2006.01); H01L 23/48 (2006.01); H01L 23/00 (2006.01);
U.S. Cl.
CPC ...
H01L 23/53228 (2013.01); H01L 23/481 (2013.01); H01L 23/485 (2013.01); H01L 23/522 (2013.01); H01L 23/528 (2013.01); H01L 23/5226 (2013.01); H01L 23/5329 (2013.01); H01L 23/53204 (2013.01); H01L 23/562 (2013.01); H01L 23/58 (2013.01); H01L 23/585 (2013.01); H01L 29/0607 (2013.01); H01L 29/0611 (2013.01); H01L 29/0619 (2013.01); H01L 23/5227 (2013.01); H01L 23/53295 (2013.01); H01L 2924/0002 (2013.01);
Abstract

The semiconductor device has insulating filmsformed over a substrate; an interconnectionburied in at least a surface side of the insulating films; insulating filmsformed on the insulating filmand including a hole-shaped via-holeand a groove-shaped via-holehaving a pattern bent at a right angle; and buried conductorsburied in the hole-shaped via-holeand the groove-shaped via-hole. A groove-shaped via-holeis formed to have a width which is smaller than a width of the hole-shaped via-hole. Defective filling of the buried conductor and the cracking of the inter-layer insulating film can be prevented. Steps on the conductor plug can be reduced. Accordingly, defective contact with the upper interconnection layer and the problems taking place in forming films can be prevented.


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