The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 02, 2016

Filed:

Oct. 05, 2015
Applicant:

Texas Instruments Incorporated, Dallas, TX (US);

Inventors:

Shashank S. Ekbote, Allen, TX (US);

Kwan-Yong Lim, Plano, TX (US);

Ebenezer Eshun, Plano, TX (US);

Youn Sung Choi, Allen, TX (US);

Assignee:
Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
H01L 29/08 (2006.01); H01L 29/45 (2006.01); H01L 27/088 (2006.01); H01L 29/66 (2006.01); H01L 21/8234 (2006.01); H01L 27/02 (2006.01); H01L 29/161 (2006.01); H01L 21/28 (2006.01); H01L 29/78 (2006.01); H01L 29/165 (2006.01); H01L 29/417 (2006.01);
U.S. Cl.
CPC ...
H01L 29/45 (2013.01); H01L 21/28123 (2013.01); H01L 21/823412 (2013.01); H01L 21/823425 (2013.01); H01L 21/823443 (2013.01); H01L 27/0207 (2013.01); H01L 27/088 (2013.01); H01L 29/0847 (2013.01); H01L 29/161 (2013.01); H01L 29/165 (2013.01); H01L 29/41725 (2013.01); H01L 29/458 (2013.01); H01L 29/665 (2013.01); H01L 29/66636 (2013.01); H01L 29/7848 (2013.01);
Abstract

An integrated circuit includes a PMOS gate structure and a gate structure on adjacent field oxide. An epitaxy hard mask is formed over the gate structure on the field oxide so that the epitaxy hard mask overlaps the semiconductor material in PMOS source/drain region. SiGe semiconductor material is epitaxially formed in the source/drain regions, so that that a top edge of the SiGe semiconductor material at the field oxide does not extend more than one third of a depth of the SiGe in the source/drain region abutting the field oxide. Dielectric spacers on lateral surfaces of the gate structure on the field oxide extend onto the SiGe; at least one third of the SiGe is exposed. Metal silicide covers at least one third of a top surface of the SiGe. A contact has at least half of a bottom of the contact directly contacts the metal silicide on the SiGe.


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