The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Aug. 02, 2016
Filed:
Dec. 05, 2014
Applicant:
Cypress Semiconductor Corporation, San Jose, CA (US);
Inventors:
Jeong Soo Byun, Cupertino, CA (US);
Krishnaswamy Ramkumar, San Jose, CA (US);
Assignee:
CYPRESS SEMICONDUCTOR CORPORATION, San Jose, CA (US);
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/31 (2006.01); H01L 21/66 (2006.01); H01L 21/28 (2006.01); H01L 21/02 (2006.01); H01L 29/16 (2006.01); H01L 29/06 (2006.01); H01L 29/51 (2006.01);
U.S. Cl.
CPC ...
H01L 22/26 (2013.01); H01L 21/0223 (2013.01); H01L 21/02252 (2013.01); H01L 21/02323 (2013.01); H01L 21/02326 (2013.01); H01L 21/28282 (2013.01); H01L 22/12 (2013.01); H01L 29/0676 (2013.01); H01L 29/16 (2013.01); H01L 29/511 (2013.01); H01L 29/518 (2013.01);
Abstract
A method of making a semiconductor structure is provided. The method includes forming a tunneling layer over a channel connecting a source and a drain formed in a surface of a substrate, forming a charge storage layer overlying the tunneling layer, and forming a blocking structure on the charge storage layer by plasma oxidation. A thickness of the charge storage layer is reduced through oxidation of a portion of the charge storage layer during the formation of the blocking structure. Other embodiments are also described.