The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 02, 2016

Filed:

Oct. 19, 2012
Applicant:

Industrial Technology Research Institute, Hsinchu, TW;

Inventors:

Chih-Yen Lo, Yangmei, TW;

Ding-Ming Kwai, Zhubei, TW;

Jin-Fu Li, Pingzhen, TW;

Yun-Chao Yu, Taipei, TW;

Che-Wei Chou, Yunlin County, TW;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G11C 29/00 (2006.01); G11C 29/16 (2006.01); G11C 29/26 (2006.01); G11C 29/40 (2006.01);
U.S. Cl.
CPC ...
G11C 29/16 (2013.01); G11C 29/26 (2013.01); G11C 29/40 (2013.01);
Abstract

A three-dimensional (3-D) memory includes: multiple memory dies, each having at least one memory bank and a built-in self-test (BIST) circuit; and a plurality of channels, for electrically connecting the memory dies. In a synchronous test, one of the memory dies is selected as a master die. The BIST circuit of the master die sends an enable signal via the channels to the memory dies under test. The BIST circuit in each of the memory dies is for testing memory banks on the same memory die or on different memory dies.


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