The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 02, 2016

Filed:

Jun. 19, 2014
Applicant:

Seagate Technology Llc, Cupertino, CA (US);

Inventors:

AbdelHakim S. Alhussien, San Jose, CA (US);

Jeremy Werner, San Jose, CA (US);

Erich F. Haratsch, San Jose, CA (US);

Earl T. Cohen, Cupertino, CA (US);

Assignee:

Seagate Technology LLC, Cupertino, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 29/00 (2006.01); G06F 11/10 (2006.01); H03M 13/29 (2006.01); H03M 13/11 (2006.01); H03M 13/15 (2006.01); H03M 13/19 (2006.01); H03M 13/23 (2006.01); H03M 13/37 (2006.01); H03M 13/43 (2006.01);
U.S. Cl.
CPC ...
G06F 11/1076 (2013.01); H03M 13/2909 (2013.01); H03M 13/1102 (2013.01); H03M 13/1108 (2013.01); H03M 13/152 (2013.01); H03M 13/19 (2013.01); H03M 13/23 (2013.01); H03M 13/3746 (2013.01); H03M 13/43 (2013.01);
Abstract

An apparatus having a memory and a controller is disclosed. The memory is configured to (i) program a protected lower unit in a lower page of a location, (ii) generate a corrected lower unit by correcting the protected lower unit using a first error correction code and (iii) program a protected upper unit in an upper page of the location based on the corrected lower unit. The controller is configured to generate the protected upper unit by encoding an upper write data item using a second error correction code. The controller is on a separate die as the memory.


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