The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Aug. 02, 2016
Filed:
Dec. 30, 2011
Stanislav Shwartsman, Haifa, IL;
Melih Ozgul, Hillsboro, OR (US);
Sebastien Hily, Portland, OR (US);
Shlomo Raikin, Ofer, IL;
Raanan Sade, Kibutz Sarid, IL;
Ron Shalev, Ceaseria, IL;
Stanislav Shwartsman, Haifa, IL;
Melih Ozgul, Hillsboro, OR (US);
Sebastien Hily, Portland, OR (US);
Shlomo Raikin, Ofer, IL;
Raanan Sade, Kibutz Sarid, IL;
Ron Shalev, Ceaseria, IL;
Intel Corporation, Santa Clara, CA (US);
Abstract
In accordance with embodiments disclosed herein, there are provided methods, systems, mechanisms, techniques, and apparatuses for cutting senior store latency using store prefetching. For example, in one embodiment, such means may include an integrated circuit or an out of order processor means that processes out of order instructions and enforces in-order requirements for a cache. Such an integrated circuit or out of order processor means further includes means for receiving a store instruction; means for performing address generation and translation for the store instruction to calculate a physical address of the memory to be accessed by the store instruction; and means for executing a pre-fetch for a cache line based on the store instruction and the calculated physical address before the store instruction retires.