The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 02, 2016

Filed:

Dec. 17, 2012
Applicant:

Intel Corporation, Santa Clara, CA (US);

Inventors:

Ankush Varma, Hillsboro, OR (US);

Krishnakanth V. Sistla, Beaverton, OR (US);

Ian M. Steiner, Hillsboro, OR (US);

Vivek Garg, Folsom, CA (US);

Chris Poirier, Fort Collins, CO (US);

Martin T. Rowland, Beaverton, OR (US);

Assignee:

Intel Corporation, Santa Clara, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 1/26 (2006.01); G06F 1/32 (2006.01); G06T 1/20 (2006.01); G06F 13/00 (2006.01); G06F 9/50 (2006.01); G06F 15/173 (2006.01);
U.S. Cl.
CPC ...
G06F 1/324 (2013.01); G06F 1/32 (2013.01); G06F 1/3203 (2013.01); G06F 1/329 (2013.01); G06F 9/505 (2013.01); G06F 9/5044 (2013.01); G06F 13/00 (2013.01); G06F 15/17325 (2013.01); G06T 1/20 (2013.01); Y02B 60/1217 (2013.01);
Abstract

In an embodiment, a processor includes a core to execute instructions, uncore logic coupled to the core, and a power controller to control a power consumption level. The power controller is configured to determine an activity level of the processor and responsive to this level, to generate a request for communication to a second processor coupled to the processor to request frequency coordination between the processors. Other embodiments are described and claimed.


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