The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Aug. 02, 2016
Filed:
Oct. 31, 2013
International Business Machines Corporation, Armonk, NY (US);
Fen Chen, Williston, VT (US);
Mukta G. Farooq, Hopewell Junction, NY (US);
John A. Griesemer, Salt Point, NY (US);
Chandrasekharan Kothandaraman, Hopewell Junction, NY (US);
John Matthew Safran, Wappingers Falls, NY (US);
Timothy Dooling Sullivan, Underhill, VT (US);
International Business Machines Corporation, Armonk, NY (US);
Abstract
Embodiments of the present invention provide a variety of structures and method for detecting abnormalities in the back-end-of-line (BEOL) stack and BEOL structures located in close proximity to through-silicon vias (TSVs) in a 3D integrated chip. The detected abnormalities may include stress, strain, and damage that will affect metallization continuity, interfacial integrity within a metal level, proximity accuracy of the TSV placement, and interlevel dielectric integrity and metallization-to-TSV dielectric integrity. Additionally, these structures in conjunction with each other are capable of determining the range of influence of the TSV. That is, how close to the TSV that a BEOL line (or via) needs to be in order to be influenced by the TSV.