The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 26, 2016

Filed:

Mar. 12, 2013
Applicants:

Kyung-in Choi, Suwon-si, KR;

Gyeom Kim, Hwasung-si, KR;

Hong-sik Yoon, Seongnam-si, KR;

Bon-young Koo, Suwon-si, KR;

Wook-je Kim, Gwacheon-si, KR;

Inventors:

Kyung-In Choi, Suwon-si, KR;

Gyeom Kim, Hwasung-si, KR;

Hong-Sik Yoon, Seongnam-si, KR;

Bon-Young Koo, Suwon-si, KR;

Wook-Je Kim, Gwacheon-si, KR;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 29/76 (2006.01); H01L 29/78 (2006.01); H01L 21/8234 (2006.01); H01L 21/8238 (2006.01); H01L 29/66 (2006.01);
U.S. Cl.
CPC ...
H01L 29/785 (2013.01); H01L 21/823431 (2013.01); H01L 29/66545 (2013.01); H01L 21/823821 (2013.01); H01L 29/66795 (2013.01); H01L 2924/13067 (2013.01);
Abstract

A semiconductor device includes a gate pattern on a substrate, a multi-channel active pattern under the gate pattern to cross the gate pattern and having a first region not overlapping the gate pattern and a second region overlapping the gate pattern, a diffusion layer in the multi-channel active pattern along the outer periphery of the first region and including an impurity having a concentration, and a liner on the multi-channel active pattern, the liner extending on lateral surfaces of the first region and not extending on a top surface of the first region. Related fabrication methods are also described.


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