The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 26, 2016

Filed:

May. 31, 2015
Applicant:

United Microelectronics Corp., Hsin-Chu, TW;

Inventors:

Yi-Wei Chen, Taichung, TW;

Chien-Chung Huang, Taichung, TW;

Kok Seen Lew, Hsinchu, TW;

Assignee:

UNITED MICROELECTRONICS CORP., Science-Based Industrial Park, Hsin-Chu, TW;

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/44 (2006.01); H01L 29/66 (2006.01); H01L 29/40 (2006.01); H01L 29/45 (2006.01); H01L 21/265 (2006.01); H01L 21/285 (2006.01); H01L 29/417 (2006.01); H01L 29/78 (2006.01); H01L 21/768 (2006.01); H01L 29/08 (2006.01); H01L 29/423 (2006.01); H01L 23/485 (2006.01);
U.S. Cl.
CPC ...
H01L 29/66795 (2013.01); H01L 21/26506 (2013.01); H01L 21/28518 (2013.01); H01L 21/76831 (2013.01); H01L 21/76843 (2013.01); H01L 21/76855 (2013.01); H01L 29/0847 (2013.01); H01L 29/401 (2013.01); H01L 29/41766 (2013.01); H01L 29/41791 (2013.01); H01L 29/4232 (2013.01); H01L 29/45 (2013.01); H01L 29/456 (2013.01); H01L 29/665 (2013.01); H01L 29/66553 (2013.01); H01L 29/785 (2013.01); H01L 23/485 (2013.01); H01L 29/6656 (2013.01); H01L 29/66545 (2013.01); H01L 29/66628 (2013.01); H01L 29/66636 (2013.01); H01L 2924/0002 (2013.01);
Abstract

A method of manufacturing a semiconductor device includes forming an epitaxial layer within a source/drain region of a semiconductor substrate, forming a fluorine-containing layer on the surface of the epitaxial layer, forming a metal gate structure within the gate region after the step of forming the fluorine-containing layer, forming an interlayer dielectric to cover the semiconductor substrate, the epitaxial layer and the metal gate structure, forming a contact hole penetrating the interlayer dielectric to expose a portion of the epitaxial layer, forming a metal silicide layer on or in the epitaxial layer on a bottom of the contact hole so that the fluorine-containing layer is disposed on the periphery of the metal silicide layer.


Find Patent Forward Citations

Loading…