The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jul. 19, 2016
Filed:
Sep. 09, 2013
International Rectifier Corporation, El Segundo, CA (US);
Eung San Cho, Torrance, CA (US);
Andrew N. Sawle, East Grinstead, GB;
Mark Pavier, Felbridge, GB;
Daniel Cutler, Betchworth, GB;
Infineon Technologies Americas Corp., El Segundo, CA (US);
Abstract
In one implementation, a semiconductor package includes a top-drain vertical FET in a first active die, a source of the top-drain vertical FET situated on a source side of the first active die and a drain and a gate of the top-drain vertical FET situated on a drain side of the first active die. The semiconductor package also includes a bottom-drain vertical FET in a second active die, a source and a gate of the bottom-drain vertical FET situated on a source side of the second active die and a drain of the bottom-drain vertical FET situated on a drain side of the second active die. The semiconductor package includes a conductive carrier attached to the source side of the first active die and to the drain side of the second active die, the conductive carrier coupling the source of the top-drain vertical FET to the drain of the bottom-drain vertical FET.