The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 19, 2016

Filed:

Jun. 16, 2015
Applicant:

Winbond Electronics Corp., Taichung, TW;

Inventor:

Kenichi Arakawa, Chiba, JP;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 16/10 (2006.01); G11C 16/14 (2006.01); G11C 16/04 (2006.01);
U.S. Cl.
CPC ...
G11C 16/14 (2013.01); G11C 16/0483 (2013.01);
Abstract

A semiconductor memory device, which restrains a breakdown of a low-voltage transistor constructing a bit line selecting circuit, is provided. An NAND string unit and transistors (BLSe, BLso, BIASe, BIASo) that construct bit line selecting circuit are formed in a P-well. The transistors are set in a floating state during erasing operation. The voltages of the transistors are increased when an erasing voltage is applied to the P-well. When the erasing voltage is discharged from the P-well, the gates of the transistors are connected to a reference potential via a discharging circuit () such that the gate voltage follows the voltage of the P-well to be discharged.


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